As part of OPENCHIP & Software Technologies System Architecture group, you will design and manufacture our next-generation, high-performance, power-efficient, system-on-chip (SoC) AI accelerators. The target product is a series of AI-specific system designed to deliver low power consumption and high-performance chips providing efficiency in machine learning and deep learning applications. These chips are used in various industries, including HPC, security, manufacturing, mobility, automotive, and more. You will be responsible for the CPU architecture design of an AI accelerator system. You will define and implement Custom ISA. You will work with System Architects to develop specifications, execute and deliver fully verified, high performance, area, and power efficient RTL to achieve the design targets. You will also design micro-architecture and RTL, synthesis, logic and timing verification using leading edge CAD tools and semiconductor process technologies. You will design and implement logic functions that enable efficient test and debug and participate in silicon bring-up and validation for blocks developed. Experience in Computer Architecture and data Arithmetic with a focus on CPU processor’s architecture. Experience in micro-architecture and RTL development (Verilog/SystemVerilog), focused on high-speed Processor and sub-system design with AI interfacing blocks. Deep understanding of SoC design flow (e.g., Specification, Architecture, RTL coding, Verification, DFT, Synthesis, Power and Timing analysis, floor planning). Experience with high frequency design considerations (timing, power, multiple clock domains, etc.). Background in physical design and knowledge of advanced process technology is a plus. Experience in architecture exploration tool development. Experience in compiler development. Understanding of RTOS.