As part of OPENCHIP & SOFTWARE TECHNOLOGIES IC Design group, you will design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC) AI accelerators. The target product is a series of AI-specific semiconductor systems designed to deliver low power consumption and high-performance chips providing efficiency in machine learning and deep learning applications. These chips are used in various industries, including HPC, security, manufacturing, mobility, automotive, and more.


Your role will be as Digital IC Design Engineer supporting the development of complex, low power, high-performance ASICs, FPGAs, and SoCs (e.g. AI accelerators, GPUs) for different target applications, including HPC, datacentres, automotive. You will work together with system architects, verification team, and physical design teams. You will be responsible for RTL design with SystemVerilog/Verilog. You will review the PPA (power, performance, area) trade-off with the chip leads and contribute on improve it.


  • Experience in the design/development and/or validation of integrated circuits.
  • Functional modelling experience and logic verification with SystemVerilog, SystemC/C++.
  • Experience in RTL design (SystemVerilog, Verilog) and RTL verification (simulation, emulation).
  • Experience in integration of 3rd party IP, synthesis, place & route, and design-for-test (DFT) insertion.
  • Experience in Static timing analysis/Dynamic timing analysis, power analysis, formal verification, and documentation development.
  • Deep understanding and experience with industry Electronic Design Automation (EDA) tools and methodologies for digital ASIC/FPGA/SoC design and verification – e.g. Synopsys, Cadence, Xilinx-; and Universal Verification Methodology (UVM).
  • Experience working on large-scale SoC design teams.
  • Experience developing digital ASICs and SoCs in state-of-the-art semiconductor fabrication processes (e.g. 7/10/12/14/16nm CMOS)